Performance Modelling of a Shared Buffer ATM Switch Architecture!

One of the most promising solutions for Broadband ISDN is the Asynchronous Transfer Mode(ATM). Many ATM switch designs have been proposed, which provide a high throughput and a low cell loss probability. The most common design is based on multistage interconnection networks. In this type of design, dedicated buffers may be at either the input ports or the output ports, or at both input and output ports. The input buffer switch has a simple architecture, but it achieves a very low throughput. On the other hand the output buffer switch is known to achieve the optimal throughput-delay performance[4].